As part of the operation of a synchronous DC-DC converter, an over-current condition is generally monitored to prevent damage to the device and the system. An impedance of a low-side transistor during actuation is commonly used for loss-less over-current sensing and protection in synchronous DC-DC buck converters. The measured current, when the low-side transistor is turned ON, is compared with a preset threshold. A fixed leading edge blanking time is usually added for filtering out ringing noise that may be present when the low-side transistor switches, or is turned, ON.
Additionally, sample-and-hold circuit has been employed in various DC-DC converters. One conventional DC-DC converter arrangement is shown in U.S. Pat. Nos. 7,372,238; 7,372,238; 7,045,993; and 7,119,522 by Tomiyoshi. This arrangement employs a sample-and-hold circuit with a DC-DC converter, but it is used for emulated current mode control, not for over-current protection. In particular, this arrangement employs a front-end sense amplifier and a switch-capacitor arrangement to store a current sense voltage so as to adjust pulse width modulations (PWM) signal in an attempt to reduce sub-harmonic oscillations in a current mode.